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Verilog-AMS
Hardware description language building on Verilog for mixed-signal integrated circuit
Verilog-AMS is a derivative of the Verilog hardware description language that includes Analog and Mixed-Signal extensions (AMS) in order to define the behavior of analog and mixed-signal systems. It extends the event-based simulator loops of Verilog/SystemVerilog/VHDL, by a continuous-time simulator, which can be used to solve differential equations in the analog-domain, as well as other problems. Both domains are coupled: analog events can trigger digital actions and vice versa.
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